Here are Special Function Registers (SFR) used by eagle 8051 microcontroller
Bit addressing | Byte addresing |
ffh | feh | fdh | fch PX6 | fbh | fah | f9h PI2C | f8h PUSB |
f8h EIP | f9h | fah | fbh | fch | fdh | feh | ffh |
f7h | f6h | f5h | f4h | f3h | f2h | f1h | f0h
| f0h | f1h | f2h | f3h | f4h | f5h | f6h | f7h |
efh | eeh | edh | ech EX6 | ebh | eah | e9h EI2C | e8h EUSB |
e8h EIE | e9h | eah | ebh | ech | edh | eeh | efh |
e7h | e6h | e5h | e4h | e3h | e2h | e1h | e0h
| e0h | e1h | e2h | e3h | e4h | e5h | e6h | e7h |
dfh | deh | ddh ERESI | dch RESI | dbh INT6 | dah | d9h | d8h |
d8h EICON | d9h | dah | dbh | dch | ddh | deh | dfh |
d7h | d6h | d5h | d4h | d3h | d2h | d1h | d0h
| d0h | d1h | d2h | d3h | d4h | d5h | d6h | d7h |
cfh TF2 | ceh | cdh | cch | cbh | cah TR2 | c9h CNT2 | c8h CAP2 |
c8h T2CON | c9h | cah | cbh | cch TL2 | cdh TH2 | ceh | cfh |
c7h | c6h | c5h | c4h | c3h | c2h | c1h | c0h
| c0h | c1h | c2h | c3h | c4h | c5h | c6h | c7h |
bfh | beh | bdh | bch | bbh | bah | b9h | b8h |
b8h | b9h | bah | bbh | bch | bdh | beh | bfh |
b7h | b6h | b5h | b4h | b3h | b2h | b1h | b0h
| b0h | b1h | b2h | b3h | b4h | b5h | b6h | b7h |
afh | aeh | adh | ach | 9bh | aah | a9h | a8h |
a8h | a9h | aah | abh | ach | adh | aeh | afh |
a7h | a6h | a5h | a4h | a3h | a2h | a1h | a0h
| a0h | a1h | a2h | a3h | a4h | a5h | a6h | a7h |
9fh | 9eh | 9dh | 9ch | 9bh | 9ah | 99h | 98h |
98h | 99h | 9ah | 9bh | 9ch | 9dh | 9eh | 9fh |
97h | 96h | 95h | 94h | 93h | 92h | 91h | 90h
| 90h | 91h EXIF | 92h | 93h | 94h | 95h | 96h | 97h |
8fh | 8eh | 8dh | 8ch | 8bh | 8ah | 89h | 88h |
88h | 89h | 8ah | 8bh | 8ch | 8dh | 8eh CKCON | 8fh |
87h | 86h | 85h | 84h | 83h | 82h | 81h | 80h | 80h | 81h | 82h DPL0 | 83h DPH0 | 84h DPL1 | 85h DPH1 | 86h DPS | 87h |
EIE - extended interrupts enable, interrupts EX4 , EX5 seems not used
- EUSB write: 0 disable USB interrupts, 1 - enable USB interrupts
- EI2C write : 0 disable I2C interrupts, 1 - enable I2C interrupts
- EX6 write: 0 disable INT6 pin interrupt, 1 - enable INT6 pin interrupt
EIP - extended interrups priority (0 - low, 1 high), interrupts EX4 , EX5 seems not used
T2CON - timer 2 control register
- CAP2 write : 0 - auto init, 1 - no auto init
- CON2 write : 0 - timer, 1 - counter
- TR2 write: 0 - stop, 1 - run
- TF2 read: 1 - timer overflow, trigger interrupt , write: 0 - interrupt received
EICON - extended interrupts control
- ERESI 0 - disable, 1- enable resume interrupt:
- RESI read: resume interrupt flag, write: interrupt received
- INT6 read: interrupt 6 flag, write: 0 - interrupt received, 1 - generate INT6 interrupt
TH2|TL2 - 16 bit timer 2 data register
CKCON - clock cykles control
- CKCON.5 or T2M timer 2 clock configuration, write: 0 - CLK/12 , 1 - CLK/4
- CKCON.0-2 number of cykles used for movx configuration
DPH0|DPL0 - DPTR pointer when DPS 0
DPH1|DPT1 - DPTR pointer when DPS 1
DPS - DPTR selector
What's the difference between Bit addressing and Byte addressing?
Instructions mnemonics or operands (and opcodes of course) example:
MOV A, 87h ; move register
MOV C, 87h ; move bit
Only registers at 80h + 8*n can be addressed by bit operation instructions.
Each bit of these registers can be manipulated individually.
SETB 87h ; set 7 bit of 80h register
Does eagle chip use only the sfr with name ?
Names or addresses are used, assember can handle both.
What does DPLx, DPHx, DPS... mean ?
I suppose they come from cypress datasheet : Data Pointer x Low Addr, Data Pointer x High Addr, Data Pointer Select
Ok, so they are pointers of 2 bytes, what's their use ? the address (relative or absolute) to the functions ?
To point 16bit address (max 64k bytes) on 8bit processor (max 256 bytes), mostly on someting like this
MOV A, @DPTR
; do something with A
MOV @DPTR, A
intel 8051 sfr map
cypress sfr map